MSM6688 Datasheet, PDF (131/159 Pages) OKI electronic componets – ADPCM Solid-State Recorder IC

¡ Semiconductor
MSM6688/6688L
2.2 When 4M-bit serial register is used
This IC's memory capacity is divided into 256 blocks for address management. This allows the
connection of an 8M-bit serial register only. When connecting a 4M-bit serial register, set pins RSEL1
and RSEL2 as if only an 8M-bit serial register were connected. Then, for actual usage, the 8M-bit serial
register is replaced by a 4M-bit serial register. Replacement by the 4M-bit serial register results in the
occurrence of an address area prohibited from being used. Thus, the CPU must control the address
area so that it is not accessed.
The recording procedure is almost the same as for using only an 8M-bit serial register. Before
recording, however, the number of available blocks must be determined, and a number of blocks that
does not exceed that value must be set each time by the BLKWR command. The following gives
the procedure for this setting.
BLKRD command
Calculate the number of available blocks
[(Number of remaining blocks) – (number of blocks for 4M bits)]
BLKWR command
Read the number of remaining blocks.
Calculated by the CPU.
Set a value not more than the number of
available blocks as the number of phrase
recording blocks.
The following example provides the number of blocks available when one 4M-bit serial register
is connected and the erasure of all phrases is followed by the first recording.
(Number of available blocks) = (number of remaining blocks) – (number of blocks for 4M bits)
= (number of remaining blocks) –
= 254 – ^{4M bits}
32K bits
4M bits
memory capacity for one block
= 254 – 128
= 126 (7Eh)
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