MSC1201 Datasheet, PDF (11/20 Pages) OKI electronic componets – 60-Bit VFD Tube Driver with Digital Dimming and PWM Conversion Function

¡ Semiconductor
MSC1201-xx
FUNCTIONAL DESCRIPTION
Power-On-Reset
The status of the internal circuit after power-on reset is as follows;
1) Shift registers and latches are reset.
2) PWM conversion mode is selected.
DATA Input
Data input is available only when the high level is applied to the "CS" pin. Input data is shifted
into shift registers through "Data" pin at the rising edge of the shift clock. The data is
automatically loaded to latches at the falling edge of "CS" signal. When M0 = "0", input data
should include display data (total of 64 bits data should be input.) and when M0 = "1", input data
should exclude display data (Total of 16-bit data should be input.)
[Data Format]
1) Display Data Input Mode
Input Data
: 64 bits
VF Display Data
: 60 bits
Mode Select Data
: 4 bits
Bit
64 63 62
D59 D58 D57
53 52 51 50 49 48
D48 M3 M2 M1 M0 D47
First In
3 21
D2 D1 D0
Display
Data
Mode
Data
Display
Data
2) Segment outputs/Shift Registers Bit Correspondence Table
The content of the table depends on a PLA code.
This table is modeled on the general purpose code of -01.
Segment output positions can be changed dependent on the PLA code, but the segment-bit
correspondence cannot be changed.
30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 SEGn
30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 GRID1
Bit
60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 GRID2
11/20