MSM9560 Datasheet, PDF (1/8 Pages) OKI electronic componets – IC for FM Multiplex Data Demodulation

E2F0011-29-32
¡ _¡ Semicond_Suc_etor_miconductor
MSM9560
IC for FM Multiplex Data Demodulation
This version: M_Mar_S._M19₉9₅9₆₀
Previous version: Jun. 1998
GENERAL DESCRIPTION
The MSM9560 is an IC which demodulates FM character multiplex signals in the DARC (Data Radio
Channel)^*1 format to obtain digital data. The MSM9560 operates at 4.5 to 5.5 V. In the DARC system,
16 kbps of digital data L-MSK modulated at 76 kHz is multiplexed on an ordinary FM broadcast base
band signal.
The MSM9560 contains on one chip a band pass filter using a switched capacitor filter (SCF) and a
group of circuits including a frame synchronization circuit and an error correction circuit.
By connecting an external FM receiver and memory for temporary data storage and by controlling
them by the CPU, a system for obtaining digital data can easily be constructed.
The FM multiplex demodulation ICs, the MSM9500-series devices, are configured with minimum
functions; so they will, merely by making changes to the software of the external microcomputer, be
able to respond flexibly to the many FM multiplex broadcast services that are going to come about
in the future.
The MSM9560 is best suited to radios and information processing devices that support DARC FM
multiplex broadcasting. It is also best suited to car radios and car navigation systems.
*1 DARC is a registered trademark of NHK Engineering Services.
Any manufacturer licensed by NHK Engineering Service can manufacture and sell products that
utilize the DARC technology.
For detailed information on license, please contact:
NHK Engineering Service
Phone: [phone]
FEATURES
• Pin compatible with MSM9552/MSM9553
• Built-in bandpass filter (SCF)
• Built-in block synchronization circuit and frame synchronization circuit
• Setting of the number of synchronization protection steps can be changed
• Data clocks are regenerated by digital PLL
• 1T delay detection
• Built-in vertical and horizontal error correction circuits
• Built-in layer 4 and layer 2 CRC processing circuit
• Parallel interface with microcontroller
• Clock output for external devices (64 kHz to 8.192 MHz variable)
• Compatible with the international standard frame format (ITU-R Rec. BS1194)
• Power supply: 4.5 to 5.5 V
• Package:
44-pin plastic QFP (QFP44-P-910-0.80-2K) (Product name: MSM9560GS-2K)
1/7