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MSM65354 Datasheet, PDF (1/20 Pages) OKI electronic componets – 8-Bit Microcontroller with A/D Converter (with LCD Driver)
E2E1020-27-Y3
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MSM65354/65353A
ThisMveSrMsio6n5:35Ja4n/6. 51939583A
Previous version: Nov. 1996
8-Bit Microcontroller with A/D Converter (with LCD Driver)
GENERAL DESCRIPTION
The MSM65354/MSM65353A is a high performance 8-bit microcontroller that employs
OKI original CPU core nX-8/50. The MSM65354 contains 24K-byte program memory, 640-
byte data memory, LCD driver, A/D converter and shift register. The MSM65353A contains
16K-byte program memory, 384-byte data memory, LCD driver, A/D converter and shift
register. Also available is the MSM65P354, which replace the on-chip program memory with
one-time PROM.
FEATURES
• Operating range
Operating voltage
Operating temperature
Operating frequency (dual clock)
High speed side
Low speed side
Current consumption (Typ.)
High speed side
Low speed side
• Minimum instruction execution time
• CPU core
• General memory space
• Local memory space
• LCD driver
• I/O port
Input-output port
Input port
Output port
• Timer
• Counter
• Buzzer output circuit
• Shift register
• A/D converter
: 2.7V to 5.5V
: –20°C to +70°C
: 0 to 10MHz (@VDD=5V±10%)
0 to 5MHz (@VDD=2.7V to 5.5V)
: 32.768kHz (@VDD=2.7V to 5.5V)
: 5mA (@5MHz, VDD=3V)
20mA (@10MHz, VDD=5V)
1.5mA (@5MHz, VDD=3V, Halt mode)
4mA (VDD=3V), Stop mode)
: 45mA (@32.768kHz, VDD=3V)
: 400ns (@10MHz), 800ns (@5MHz)
: 8-bit CPU core nX-8/50
: 24K-byte program memory + 256-byte data
memory (MSM65354)
16K-byte program memory (MSM65353A)
: 384-byte data memory + SFR
: 32 ¥ 4 (selectable duty cycle from 1/4, 1/3 or
1/2 with software)
: 5 ports ¥ 8 bits
: 1 port ¥ 1 bit, 1 port ¥ 8 bits
: 1 port ¥ 1 bit
: 8-bit auto-reload timer ¥ 3 (one of them can
be used for the shift clock of shift register)
: Watch timer counter ¥ 1
: Time base counter ¥ 1 (14 bits)
: 1 line, selectable from 1000Hz to 16000Hz
(@10MHz)
: 2ch, with 16-byte automatic transfer
function ¥ 1, clock sync mode ¥ 1
: 8ch, 8 bits (4ch of them can start the CPU
according to level detection interrupt)
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