MSM54V12222A Datasheet, PDF (1/14 Pages) OKI electronic componets – 262,214 Words x 12 Bits FIELD MEMORY

OKI Semiconductor
OKI Semiconductor
MSM54V12222A
262,214 Words ¥ 12 Bits FIELD MEMORY
MSM54V12222A
REVISION-1 1997. 9 . 30
GENERAL DESCRIPTION
The OKI MSM54V12222A is a high performance 3M bits, 256K X 12 bits, Field Memory especially de-
signed for high-speed serial access applications such as HDTVs, conventional NTSC TVs, VTRs, digital
movies and Multi-media systems. MSM54V12222A is a FRAM for wide or low end use as general com-
modity TVs and VTRs, exclusively. MSM54V12222A is not designed for the other use or high end use as
medical systems, professional graphics systems require long time picture storage, data storage systems
and others. More than two MSM54V12222As can be cascaded directly without any delay devices among
the MSM54V12222As. ( Cascading of MSM54V12222A provides larger storage depth or a longer delay.)
Each of the 12-bits planes has separate serial write and read ports that employ independent control clocks
to support asynchronous read and write operations. Different clock rates are also supported that allow
alternate data rates between write and read data streams.
The MSM54V12222A provides high speed FIFO, First-In First-Out, operation without external refreshing:
MSM54V12222A refreshes its DRAM storage cells automatically, so that it appears fully static to the
users.
Moreover, fully static type memory cells and decoders for serial access enable the serial access operation
refresh free, so that serial read and/or write control clock can be halted high or low for any time as long as
the power is on. Internal conflicts of any memory access and refreshing operation are prevented by
special arbitration logic.
The MSM54V12222A's function is simple like that of a digital delay device whose delay-bit-length is easily
set by reset timing. The delay length, number of read delay clocks between write and read, is determined
by externally controlled write and read reset timings.
Additional SRAM serial registers, or line buffers, for the initial access of 256X12 bits enable high speed
first-bit-access with no clock delay just after the write or read reset timings.
In addition to cascade capability, MSM54V12222A has write mask function or input enable function (IE),
and read- data skipping function or output enable function(OE). The differences between write enable
(WE) and input enable (IE), and between read enable (RE) and output enable (OE) are that WE and RE
can stop serial write/read address increments but IE and OE can not stop the increment when write/read
clocking is continuously applied to MSM54V12222A. The input enable (IE) function allows the user to
write into selected locations of the memory only, leaving the rest of the memory contents unchanged. This
facilitates data processing as "picture in picture" on a TV screen simply.
The MSM54V12222A is similar in operation and functionality to OKI 1M bits Field memory MSM51V4222C
and 2M bits Field memory MSM51V8222A. Three MSM51V4222Cs or one MSM51V4222C plus one
MSM51V8222A can be replaced simply by one MSM₁ 54V12222A.