LPC2210 Datasheet, PDF (9/49 Pages) NXP Semiconductors – 16/32-bit ARM microcontroller with 10-bit ADC and external memory interface

NXP Semiconductors
LPC2210/2220
16/32-bit ARM microcontrollers with external memory interface
Table 4. Pin description …continued
Symbol
Pin (LQFP) Pin (TFBGA) Type
P0.28/AIN1/
25^[4]
J1^[4]
I
CAP0.2/MAT0.2
I
O
P0.29/AIN2/
32^[4]
L1^[4]
I
CAP0.3/MAT0.3
I
O
P0.30/AIN3/
33^[4]
L2^[4]
I
EINT3/CAP0.0
I
I
P1.0 to P1.31
I/O
P1.0/CS0
91^[5]
P1.1/OE
P1.16/
TRACEPKT0
P1.17/
TRACEPKT1
P1.18/
TRACEPKT2
P1.19/
TRACEPKT3
P1.20/
TRACESYNC
90^[5]
34^[5]
24^[5]
15^[5]
7^[5]
102^[5]
P1.21/
PIPESTAT0
P1.22/
PIPESTAT1
P1.23/
PIPESTAT2
P1.24/
TRACECLK
P1.25/EXTIN0
95^[5]
86^[5]
82^[5]
70^[5]
60^[5]
G11^[5]
O
G13^[5]
O
L3^[5]
O
H4^[5]
O
F2^[5]
O
D2^[5]
O
D12^[5]
O
F11^[5]
O
H11^[5]
O
J11^[5]
O
L11^[5]
O
K8^[5]
I
Description
AIN1 — ADC, input 1. This analog input is always connected
to its pin.
CAP0.2 — Capture input for Timer 0, channel 2.
MAT0.2 — Match output for Timer 0, channel 2.
AIN2 — ADC, input 2. This analog input is always connected
to its pin.
CAP0.3 — Capture input for Timer 0, Channel 3.
MAT0.3 — Match output for Timer 0, channel 3.
AIN3 — ADC, input 3. This analog input is always connected
to its pin.
EINT3 — External interrupt 3 input.
CAP0.0 — Capture input for Timer 0, channel 0.
Port 1: Port 1 is a 32-bit bidirectional I/O port with individual
direction controls for each bit. The operation of port 1 pins
depends upon the pin function selected via the Pin Connect
Block.
Pins 0 through 15 of port 1 are not available.
CS0 — LOW-active Chip Select 0 signal.
(Bank 0 addresses range 8000 0000 to 80FF FFFF)
OE — LOW-active Output Enable signal.
TRACEPKT0 — Trace Packet, bit 0. Standard I/O port with
internal pull-up.
TRACEPKT1 — Trace Packet, bit 1. Standard I/O port with
internal pull-up.
TRACEPKT2 — Trace Packet, bit 2. Standard I/O port with
internal pull-up.
TRACEPKT3 — Trace Packet, bit 3. Standard I/O port with
internal pull-up.
TRACESYNC — Trace Synchronization. Standard I/O port
with internal pull-up.
Note: LOW on this pin while RESET is LOW, enables pins
P1[25:16] to operate as Trace port after reset.
PIPESTAT0 — Pipeline Status, bit 0. Standard I/O port with
internal pull-up.
PIPESTAT1 — Pipeline Status, bit 1. Standard I/O port with
internal pull-up.
PIPESTAT2 — Pipeline Status, bit 2. Standard I/O port with
internal pull-up.
TRACECLK — Trace Clock. Standard I/O port with internal
pull-up.
EXTIN0 — External Trigger Input. Standard I/O with internal
pull-up.
LPC2210_2220_4
Product data sheet
Rev. 04 — 2 October 2007
© NXP B.V. 2007. All rights reserved.
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