74AUP1G17 Datasheet, PDF (9/20 Pages) NXP Semiconductors – Low-power Schmitt-trigger buffer

NXP Semiconductors
12. Waveforms
74AUP1G17
Low-power Schmitt trigger
V_I
A input
GND
V_OH
Y output
V_OL
V_M
t _PHL
V_M
t _PLH
mnb153
Measurement points are given in Table 9.
Logic levels: V_OL and V_OH are typical output voltage levels that occur with the output load.
Fig 7. The data input (A) to output (Y) propagation delays
Table 9. Measurement points
Supply voltage
Output
Input
V_CC
0.8 V to 3.6 V
V_M
V_M
V_I
0.5 × V_CC
0.5 × V_CC
V_CC
t_r = t_f
≤ 3.0 ns
V_CC
V_EXT
5 kΩ
G
VI
VO
DUT
RT
CL
RL
001aac521
Test data is given in Table 10.
Definitions for test circuit:
R_L = Load resistance.
C_L = Load capacitance including jig and probe capacitance.
R_T = Termination resistance should be equal to the output impedance Z_o of the pulse generator.
V_EXT = External voltage for measuring switching times.
Fig 8. Load circuitry for switching times
Table 10. Test data
Supply voltage Load
V_CC
0.8 V to 3.6 V
C_L
R_L[1]
5 pF, 10 pF, 15 pF and 30 pF 5 kΩ or 1 MΩ
V_EXT
t_PLH, t_PHL
open
t_PZH, t_PHZ
GND
t_PZL, t_PLZ
2 × V_CC
[1] For measuring enable and disable times R_L = 5 kΩ, for measuring propagation delays, setup and hold times and pulse width R_L = 1 MΩ.
74AUP1G17_3
Product data sheet
Rev. 03 — 10 July 2009
© NXP B.V. 2009. All rights reserved.
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