PN532 Datasheet, PDF (8/27 Pages) NXP Semiconductors – Near Field Communication (NFC) controller

NXP Semiconductors
7.1.2 Simplified block diagram
PN532
PN532/C1
Near Field Communication (NFC) controller
80C51
FIFO
Serial
Data
Switch
CL UART
Contactless Interface Unit
Data
Mode
Detector
RF
Level
Detector
Analog
Interface
Fig 2. Simplify Contactless Interface Unit (CIU) block diagram
The Analog Interface handles the modulation and demodulation of the analog signals
according to the Card emulation mode, Reader/Writer mode and NFCIP-1 mode
communication scheme.
The RF level detector detects the presence of an external RF-field delivered by the
antenna to the RX pin.
The data mode detector detects a ISO/IEC 14443-A MIFARE, FeliCa or NFCIP-1 mode in
order to prepare the internal receiver to demodulate signals, which are sent to the PN532.
The NFC-WI/S²C interface supports communication to secure IC. It also supports digital
signals for transfer speeds above 424 kbit/s.
The CL UART handles the protocol requirements for the communication schemes in
co-operation with the appropriate firmware. The FIFO buffer allows a convenient data
transfer from the 80C51 to the CIU and vice versa.
PN512_C1_SDS
Product short data sheet
COMPANY PUBLIC
All information provided in this document is subject to legal disclaimers.
Rev. 3.2 — 20 September 2012
120132
© NXP B.V. 2012. All rights reserved.
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