PCF8563TF4.118 Datasheet, PDF (7/50 Pages) NXP Semiconductors – Real-time clock/calendar

NXP Semiconductors
PCF8563
Real-time clock/calendar
8.2 Register organization
Table 4. Formatted registers overview
Bit positions labelled as x are not relevant. Bit positions labelled with N should always be written with logic 0; if read they
could be either logic 0 or logic 1. After reset, all registers are set according to Table 27.
Address Register name Bit
7
6
5
4
3
2
1
0
Control and status registers
00h
Control_status_1 TEST1 N
STOP N
TESTC N
N
N
01h
Control_status_2 N
N
N
TI_TP AF
TF
AIE
TIE
Time and date registers
02h
VL_seconds
VL
SECONDS (0 to 59)
03h
Minutes
x
MINUTES (0 to 59)
04h
Hours
x
x
HOURS (0 to 23)
05h
Days
x
x
DAYS (1 to 31)
06h
Weekdays
x
x
x
x
x
WEEKDAYS (0 to 6)
07h
Century_months C
x
x
MONTHS (1 to 12)
08h
Years
YEARS (0 to 99)
Alarm registers
09h
Minute_alarm
AE_M MINUTE_ALARM (0 to 59)
0Ah
Hour_alarm
AE_H x
HOUR_ALARM (0 to 23)
0Bh
Day_alarm
AE_D x
DAY_ALARM (1 to 31)
0Ch
Weekday_alarm AE_W x
x
x
x
WEEKDAY_ALARM (0 to 6)
CLKOUT control register
0Dh
CLKOUT_control FE
x
x
x
x
x
FD[1:0]
Timer registers
0Eh
Timer_control
TE
x
x
x
x
x
TD[1:0]
0Fh
Timer
TIMER[7:0]
PCF8563
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 10 — 3 April 2012
© NXP B.V. 2012. All rights reserved.
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