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PCA9848PWJ Datasheet, PDF (7/32 Pages) NXP Semiconductors – 8-channel ultra-low voltage, Fm+ I2C-bus switch with reset
NXP Semiconductors
PCA9848
8-channel ultra-low voltage, Fm+ I2C-bus switch with reset
6.2.1 Software Reset
The Software Reset Call allows all the devices in the I2C-bus to be reset to the power-up
state value through a specific formatted I2C-bus command. To be performed correctly, it
implies that the I2C-bus is functional and that there is no device hanging the bus.
The Software Reset sequence is defined as following:
1. A START command is sent by the I2C-bus master.
2. The reserved General Call I2C-bus address ‘0000 000’ with the R/W bit set to 0 (write)
is sent by the I2C-bus master.
3. The device acknowledges after seeing the General Call address ‘0000 0000’ (00h)
only. If the R/W bit is set to 1 (read), no acknowledge is returned to the I2C-bus
master.
4. Once the General Call address has been sent and acknowledged, the master sends
1 byte. The value of the byte must be equal to 06h.
a. The device acknowledges this value only. If the byte is not equal to 06h, the device
does not acknowledge it.
If more than 1 byte of data is sent, the device does not acknowledge any more.
5. Once the right byte has been sent and correctly acknowledged, the master sends a
STOP command to end the Software Reset sequence: the device then resets to the
default value (power-up value) and is ready to be addressed again within the specified
bus free time. If the master sends a Repeated START instead, no reset is performed.
The I2C-bus master must interpret a non-acknowledge from the device (at any time) as a
‘Software Reset Abort’. The device does not initiate a reset of its registers.
The unique sequence that initiates a Software Reset is described in Figure 7.
SWRST Call I2C-bus address
SWRST data = 06h
S0 0 0 0 0 0 0 0A0 0 0 0 0 1 1 0AP
START condition
R/W
acknowledge
acknowledge
from slave(s)
from slave(s)
PCA9848 is reset.
Registers are set to default power-up values.
aaa-011779
Fig 7. Software Reset sequence
PCA9848
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 15 December 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
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