74LVC2G08 Datasheet, PDF (7/16 Pages) Panasonic Semiconductor – Dual 2-input AND gate

NXP Semiconductors
74LVC2G08
Dual 2-input AND gate
11. Dynamic characteristics
Table 8. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9.
Symbol Parameter
Conditions
−40 °C to +85 °C
Min
Typ^[1] Max
t_pd
propagation delay nA, nB to nY; see Figure 8
[2]
V_CC = 1.65 V to 1.95 V
1.0
3.2
9.0
V_CC = 2.3 V to 2.7 V
0.5
2.2
5.1
V_CC = 2.7 V
1.0
2.5
5.3
V_CC = 3.0 V to 3.6 V
0.5
2.1
4.7
V_CC = 4.5 V to 5.5 V
0.5
C_PD
power dissipation per gate; V_I = GND to V_CC
[3]
-
capacitance
1.7
3.8
14.4
-
−40 °C to +125 °C Unit
Min
Max
1.0
11.3 ns
0.5
6.4 ns
1.0
6.7 ns
0.5
5.9 ns
0.5
4.8 ns
-
-
pF
[1] Typical values are measured at nominal V_CC and at T_amb = 25 °C.
[2] t_pd is the same as t_PLH and t_PHL
[3] C_PD is used to determine the dynamic power dissipation (P_D in µW).
P_D = C_PD × V_CC2 × f_i × N + Σ(C_L × V_CC2 × f_o) where:
f_i = input frequency in MHz;
f_o = output frequency in MHz;
C_L = output load capacitance in pF;
V_CC = supply voltage in V;
N = number of inputs switching;
Σ(C_L × V_CC2 × f_o) = sum of outputs.
12. Waveforms
V_I
nA, nB input
GND
V_OH
nY output
V_OL
V_M
t _PHL
V_M
t _PLH
mna224
Fig 8.
Measurement points are given in Table 9.
V_OL and V_OH are typical output voltage levels that occur with the output load.
Input (nA, nB) to output (nY) propagation delays
74LVC2G08_8
Product data sheet
Rev. 08 — 9 June 2008
© NXP B.V. 2008. All rights reserved.
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