74HC4520N Datasheet, PDF (7/7 Pages) NXP Semiconductors – Dual 4-bit synchronous binary counter

Philips Semiconductors
Dual 4-bit synchronous binary counter
AC WAVEFORMS
Product specification
74HC/HCT4520
Conditions:
nCP₁ = HIGH while nCP₀ is triggered on a LOW-to-HIGH transition; t_W
and t_rem also apply when nCP₀ = LOW and nCP₁ is triggered on a
HIGH-to-LOW transition.
(1) HC : V_M = 50%; V_I = GND to V_CC.
HCT: V_M = 1.3 V; V_I = GND to 3 V.
Fig.7 Waveforms showing removal time for nMR; minimum nCP₀, nCP₁, nMR pulse widths and maximum clock
pulse frequency.
(1) HC : V_M = 50%; V_I = GND to V_CC.
HCT: V_M = 1.3 V; V_I = GND to 3 V.
Fig.8 Waveforms showing set-up times for nCP₀ to nCP₁ and nCP₁ to nCP₀, propagation delays and output
transition times.
(1) HC : V_M = 50%; V_I = GND to V_CC.
HCT: V_M = 1.3 V; V_I = GND to 3 V.
Fig.9 Waveforms showing propagation delay from nMR to nQ_n output.
PACKAGE OUTLINES
See “74HC/HCT/HCU/HCMOS Logic Package Outlines”.
December 1990
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