TDA8944AJ Datasheet, PDF(6/20 Page) NXP Semiconductors – 2 x 7 W BTL audio amplifier with DC gain control

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TDA8944AJ Datasheet, PDF (6/20 Pages) NXP Semiconductors – 2 x 7 W BTL audio amplifier with DC gain control

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Philips Semiconductors

TDA8944AJ

2 x 7 W BTL audio ampliï¬er with DC gain control

Table 4: Power rating as function of headroom

Headroom

Power output (THD = 0.2%)

0 dB

12 dB

Po = 4 W

Po(ALL) = 252.4 mW

Power dissipation

P = 7.8 W

P = 4.0 W

For the average listening level a power dissipation of 4 W can be used for a heatsink

calculation.

8.3 Mode selection

The TDA8944AJ has three functional modes, which can be selected by applying the

proper DC voltage to pin MODE.

Standby â In this mode the current consumption is very low and the outputs are

ï¬oating. The device is in standby mode when VMODE > (VCC â 0.5 V), or when the

MODE pin is left ï¬oating.

Mute â In this mode the ampliï¬er is DC-biased but not operational (no audio output).

This allows the input coupling capacitors to be charged to avoid pop-noise. The

device is in mute mode when 3.5 V < VMODE < (VCC â 1.5 V).

Operating â In this mode the ampliï¬er is operating normally. The operating mode is

activated at VMODE < 1.0 V.

8.3.1 Switch-on and switch-off

To avoid audible plops during supply voltage switch-on or switch-off, the device is set

to standby mode before the supply voltage is applied (switch-on) or removed

(switch-off).

The switch-on and switch-off time can be inï¬uenced by an RC-circuit on the MODE

pin. Rapid on/off switching of the device or the rapid switching of the MODE pin may

cause âclick-and pop-noiseâ. This can be prevented by proper timing of the RC-circuit

on the MODE pin.

8.4 DC gain control

The gain of both ampliï¬ers can be adjusted (logarithmic) by applying an external DC

voltage source on pin GC (see Figure 6). The DC voltage source range is

0.5 to 4.0 V. This feature can be used for volume control or a preset gain.

The maximum voltage gain is set at +30 dB and the control range is more than 80 dB,

so the minimal gain is less than â50 dB. When pin GC is not connected, the gain is

set at +24 dB.

8.5 Supply Voltage Ripple Rejection (SVRR)

The SVRR is measured with an electrolytic capacitor of 10 ÂµF on pin SVR at a

bandwidth of 10 Hz to 80 kHz. Figure 14 illustrates the SVRR as function of the

frequency. A larger capacitor value on the SVR pin improves the ripple rejection

behavior at the lower frequencies.

9397 750 09433

Product data

Rev. 01 â 01 March 2002

6 of 20

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