PH3120L Datasheet, PDF (6/12 Pages) NXP Semiconductors – N-channel TrenchMOS logic level FET

NXP Semiconductors
PH3120L
N-channel TrenchMOS logic level FET
20
2.5
I_D
(A)
4.5
15
10
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V_GS (V) = 2.1
2
10
1.9
5
1.8
0
0
0.2
0.4
0.6
0.8
1
V_DS (V)
40
I_D
(A)
30
20
10
0
0
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T_j = 150 °C
25 °C
1
2
3
V_GS (V)
Fig 5. Output characteristics: drain current as a
Fig 6. Transfer characteristics: drain current as a
function of drain-source voltage; typical values
function of gate-source voltage; typical values
2.5
V_GS(th)
(V)
2
max
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10^-1
I_D
(A)
10^-2
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1.5
typ
1
min
10^-3
min
typ
max
10^-4
0.5
10^-5
0
-60
0
60
120
180
T_j (°C)
10^-6
0
1
2
3
V_GS (V)
Fig 7. Gate-source threshold voltage as a function of Fig 8. Sub-threshold drain current as a function of
junction temperature
gate-source voltage
PH3120L_3
Product data sheet
Rev. 03 — 30 March 2009
© NXP B.V. 2009. All rights reserved.
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