English
Language : 

74LVC1G386 Datasheet, PDF (6/12 Pages) NXP Semiconductors – 3-input EXCLUSIVE-OR gate
NXP Semiconductors
74LVC1G386
3-input EXCLUSIVE-OR gate
11. Dynamic characteristics
Table 8. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 6.
Symbol Parameter
Conditions
−40 °C to +85 °C
Min Typ[1] Max
tpd
propagation delay A, B, C to Y; see Figure 5
[2]
VCC = 1.65 V to 1.95 V
2.0
8.0
17.0
VCC = 2.3 V to 2.7 V
1.5
5.0
9.0
VCC = 2.7 V
1.5
5.0
8.5
VCC = 3.0 V to 3.6 V
1.0
4.5
7.5
VCC = 4.5 V to 5.5 V
1.0
3.5
5.5
CPD
power dissipation VI = GND to VCC; VCC = 3.3 V [3]
-
13
-
capacitance
−40 °C to +125 °C Unit
Min
Max
2.0
22.0 ns
1.5
11.5 ns
1.5
11.0 ns
1.0
9.5
ns
1.0
7.0
ns
-
-
pF
[1] Typical values are measured at Tamb = 25 °C and VCC = 1.8 V, 2.5 V, 2.7 V, 3.3 V and 5.0 V respectively.
[2] tpd is the same as tPLH and tPHL.
[3] CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + ∑(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
∑(CL × VCC2 × fo) = sum of outputs.
12. AC waveforms
VI
A, B, C
input
GND
Y output
in phase
VOH
VOL
Y output
out of phase
VOH
VOL
VM
t PHL
VM
t PLH
VM
Measurement points are given in Table 9.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig 5. Input A, B, C to output Y propagation delays
t PLH
tPHL
mnb147
74LVC1G386_2
Product data sheet
Rev. 02 — 3 September 2007
© NXP B.V. 2007. All rights reserved.
6 of 12