74LVC14APW-T Datasheet, PDF(6/18 Page) NXP Semiconductors – Hex inverting Schmitt trigger with 5 V tolerant input

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74LVC14APW-T Datasheet, PDF (6/18 Pages) NXP Semiconductors – Hex inverting Schmitt trigger with 5 V tolerant input

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NXP Semiconductors

74LVC14A

Hex inverting Schmitt trigger with 5 V tolerant input

Table 7. Dynamic characteristics â¦continued

Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 7.

Symbol Parameter

Conditions

ï40 ï°C to +85 ï°C

Min Typ[1] Max

CPD

power dissipation

per buffer; VI = GND to VCC

[4]

capacitance

VCC = 1.65 V to 1.95 V

9.0

VCC = 2.3 V to 2.7 V

12.5

VCC = 3.0 V to 3.6 V

15.6

ï40 ï°C to +125 ï°C Unit

Min

Max

- pF

[1] Typical values are measured at Tamb = 25 ï°C and VCC = 1.2 V, 1.8 V, 2.5 V, 2.7 V, and 3.3 V respectively.

[2] tpd is the same as tPLH and tPHL.

[3] Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.

[4] CPD is used to determine the dynamic power dissipation (PD in ïW).

PD = CPD ï´ VCC2 ï´ fi ï´ N + ï(CL ï´ VCC2 ï´ fo) where:

fi = input frequency in MHz; fo = output frequency in MHz

CL = output load capacitance in pF

VCC = supply voltage in Volts

N = number of inputs switching

ï(CL ï´ VCC2 ï´ fo) = sum of the outputs.

12. Waveforms

nA input

GND

VOH

nY output

VOL

t PHL

t PLH

mna344

Fig 6.

VM = 1.5 V at VCC ï³ 2.7 V

VM = 0.5 ï´ VCC at VCC < 2.7 V.

VOL and VOH are typical output voltage levels that occur with the output load.

Propagation delay input (nA) to output (nY)

74LVC14A

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 5 â 23 December 2011

6 of 18

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