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74HC240 Datasheet, PDF (6/18 Pages) NXP Semiconductors – Octal buffer/line driver; 3-state; inverting
NXP Semiconductors
74HC240; 74HCT240
Octal buffer/line driver; 3-state; inverting
Table 6. Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions
25 °C
−40 °C to +85 °C −40 °C to +125 °C Unit
Min Typ Max Min Max
Min
Max
VOL
LOW-level
VI = VIH or VIL
output voltage IO = 20 µA; VCC = 2.0 V
- 0 0.1
-
0.1
-
0.1 V
IO = 20 µA; VCC = 4.5 V
- 0 0.1
-
0.1
-
0.1 V
IO = 20 µA; VCC = 6.0 V
- 0 0.1
-
0.1
-
0.1 V
IO = 6.0 mA; VCC = 4.5 V
- 0.15 0.26 -
0.33
-
0.4 V
IO = 7.8 mA; VCC = 6.0 V
- 0.16 0.26 -
0.33
-
0.4 V
II
input leakage VI = VCC or GND;
current
VCC = 6.0 V
- - ±0.1 -
±1.0
-
±1.0 µA
IOZ
OFF-state
per input pin; VI = VIH or VIL;
output current VO = VCC or GND;
other inputs at VCC or GND;
VCC = 6.0 V; IO = 0 A
- - ±0.5 -
±5.0
-
±10 µA
ICC
supply current VI = VCC or GND; IO = 0 A;
VCC = 6.0 V
- - 8.0
-
80
-
160 µA
CI
input
capacitance
- 3.5 -
-
-
-
- pF
74HCT240
VIH
HIGH-level VCC = 4.5 V to 5.5 V
input voltage
2.0 1.6 -
2.0
-
2.0
-V
VIL
LOW-level
VCC = 4.5 V to 5.5 V
input voltage
- 1.2 0.8
-
0.8
-
0.8 V
VOH
HIGH-level
VI = VIH or VIL; VCC = 4.5 V
output voltage IO = −20 µA
4.4 4.5 -
4.4
-
4.4
-V
IO = −6 mA
3.98 4.32 - 3.84
-
3.7
-V
VOL
LOW-level
VI = VIH or VIL; VCC = 4.5 V
output voltage IO = 20 µA
- 0 0.1
-
0.1
-
0.1 V
IO = 6.0 mA
- 0.16 0.26 -
0.33
-
0.4 V
II
input leakage VI = VCC or GND;
current
VCC = 5.5 V
- - ±0.1 -
±1.0
-
±1.0 µA
IOZ
OFF-state
per input pin; VI = VIH or VIL;
output current VO = VCC or GND;
other inputs at VCC or GND;
VCC = 5.5 V; IO = 0 A
- - ±0.5 -
±5.0
-
±10 µA
ICC
supply current VI = VCC or GND;
VCC = 5.5 V; IO = 0 A
- - 8.0
-
80
-
160 µA
∆ICC
additional
supply current
per input pin;
VI = VCC − 2.1 V;
other inputs at VCC or GND;
VCC = 4.5 V to 5.5 V;
IO = 0 A
nAn or inputs
- 150 540
-
675
-
735 µA
nOE input
- 70 252
-
315
-
343 µA
CI
input
capacitance
- 3.5 -
-
-
-
- pF
74HC_HCT240_3
Product data sheet
Rev. 03 — 2 August 2007
© NXP B.V. 2007. All rights reserved.
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