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| 74HC1G32 Datasheet, PDF (6/11 Pages) NXP Semiconductors – 2-input OR gate | |||
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NXP Semiconductors
12. Waveforms
74HC1G32; 74HCT1G32
2-input OR gate
A, B input
Y output
VM
tPHL
VM
Fig 5. The input (A and B) to output (Y) propagation delays
tPLH
mna167
PULSE
VI
GENERATOR
VCC
VO
DUT
RT
CL
mna101
Measurement points are given in Table 8. Deï¬nitions for test circuit:
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
Fig 6. Load circuitry for switching times
74HC_HCT1G32_5
Product data sheet
Rev. 05 â 14 March 2008
© NXP B.V. 2008. All rights reserved.
6 of 11
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