74AHCT08PW118 Datasheet, PDF (6/14 Pages) NXP Semiconductors – Quad 2-input AND gate Rev. 03 — 14 November 2007

NXP Semiconductors
74AHC08; 74AHCT08
Quad 2-input AND gate
10. Dynamic characteristics
Table 7. Dynamic characteristics
GND = 0 V; For test circuit see Figure 7.
Symbol Parameter Conditions
25 °C
−40 °C to +85 °C −40 °C to +125 °C Unit
Min Typ^[1] Max Min
Max
Min
Max
For type 74AHC08
t_pd
propagation nA, nB to nY; see Figure 6 ^[2]
delay
V_CC = 3.0 V to 3.6 V
C_L = 15 pF
- 4.0 8.8 1.0
10.5
1.0
11.0 ns
C_L = 50 pF
- 5.6 12.3 1.0
14
1.0
15.5 ns
V_CC = 4.5 V to 5.5 V
C_L = 15 pF
- 3.0 5.9 1.0
7.0
1.0
7.5 ns
C_L = 50 pF
4.2 7.9 1.0
9.0
1.0
10.0 ns
C_PD
power
C_L = 50 pF; f_i = 1 MHz;
[3] _{- 10.0 -}
-
-
-
-
pF
dissipation V_I = GND to V_CC
capacitance
For type 74AHCT08
t_pd
propagation nA, nB to nY; see Figure 6 ^[2]
delay
V_CC = 4.5 V to 5.5 V
C_L = 15 pF
- 3.2 6.9 1.0
8.0
1.0
9.0 ns
C_L = 50 pF
- 4.2 7.9 1.0
9.0
1.0
10.0 ns
C_PD
power
C_L = 50 pF; f_i = 1 MHz;
[3] _{- 12.0 -}
-
-
-
-
pF
dissipation V_I = GND to V_CC
capacitance
[1] Typical values are measured at nominal supply voltage (V_CC = 3.3 V and V_CC = 5.0 V).
[2] t_pd is the same as t_PLH and t_PHL.
[3] C_PD is used to determine the dynamic power dissipation (P_D in µW).
P_D = C_PD × V_CC2 × f_i × N + Σ(C_L × V_CC2 × f_o) where:
f_i = input frequency in MHz, f_o = output frequency in MHz
C_L = output load capacitance in pF
V_CC = supply voltage in Volts
N = number of inputs switching
Σ(C_L × V_CC2 × f_o) = sum of the outputs.
74AHC_AHCT08_3
Product data sheet
Rev. 03 — 14 November 2007
© NXP B.V. 2007. All rights reserved.
6 of 14