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| P89LPC9301 Datasheet, PDF (57/65 Pages) NXP Semiconductors – 8-bit microcontroller with accelerated two-clock 80C51 core 4 kB/8 kB 3 V byte-erasable flash | |||
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NXP Semiconductors
P89LPC9301/931A1
8-bit microcontroller with accelerated two-clock 80C51 core
SS
SPICLK
(CPOL = 0)
(output)
SPICLK
(CPOL = 1)
(output)
tSPIF
TSPICYC
tSPICLKL
tSPIR
tSPICLKH
tSPIF
tSPICLKH
tSPICLKL
tSPIR
MISO
(input)
MOSI
(output)
tSPIF
tSPIDSU tSPIDH
MSB/LSB in
tSPIDV
master MSB/LSB out
tSPIOH
Fig 34. SPI master timing (CPHA = 1)
LSB/MSB in
tSPIDV
master LSB/MSB out
tSPIDV
tSPIR
002aaa909
SS
SPICLK
(CPOL = 0)
(input)
SPICLK
(CPOL = 1)
(input)
tSPIA
MISO
(output)
tSPIR
tSPILEAD
TSPICYC
tSPIF
tSPICLKH
tSPICLKL
tSPIR
tSPIF
tSPICLKL
tSPIR
tSPICLKH
tSPIOH
tSPIDV
slave MSB/LSB out
tSPIOH
tSPIDV
tSPILAG
tSPIR
tSPIOH
tSPIDIS
slave LSB/MSB out not defined
MOSI
(input)
tSPIDSU tSPIDH
MSB/LSB in
tSPIDSU
Fig 35. SPI slave timing (CPHA = 0)
tSPIDSU tSPIDH
LSB/MSB in
002aaa910
P89LPC9301_931A1_1
Preliminary data sheet
Rev. 01 â 9 April 2009
© NXP B.V. 2009. All rights reserved.
57 of 65
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