P89LPC970 Datasheet, PDF (55/66 Pages) NXP Semiconductors – 8-bit microcontroller with accelerated two-clock 80C51 core 2 kB/4 kB/8 kB wide-voltage byte-erasable flash

NXP Semiconductors
10.1 Waveforms
P89LPC970/971/972
8-bit microcontroller with accelerated two-clock 80C51 core
t_CHCL
t_CLCX
t_CHCX
t_CLCH
T_cy(clk)
Fig 17. External clock timing (with an amplitude of at least V_i(RMS) = 200 mV)
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T_XLXL
clock
t_QVXH
t_XHQX
output data
0
1
2
3
4
5
6
7
write to SBUF
input data
t_XHDV
t_XHDX
set TI
valid
valid
valid
valid
valid
valid
valid
valid
clear RI
set RI
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Fig 18. Shift register mode timing
SS
SPICLK
(CPOL = 0)
(output)
SPICLK
(CPOL = 1)
(output)
MISO
(input)
MOSI
(output)
T_SPICYC
t_SPIF
t_SPICLKL
t_SPICLKH
t_SPIR
t_SPIF
t_SPICLKL
t_SPIR
t_SPICLKH
t_SPIF
t_SPIDSU t_SPIDH
MSB/LSB in
t_SPIDV
master MSB/LSB out
t_SPIOH
LSB/MSB in
t_SPIDV
master LSB/MSB out
t_SPIR
Fig 19. SPI master timing (CPHA = 0)
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P89LPC97X_2
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 02 — 27 April 2010
© NXP B.V. 2010. All rights reserved.
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