PCF8562 Datasheet, PDF (5/36 Pages) NXP Semiconductors – Universal LCD driver for low multiplex rates

NXP Semiconductors
PCF8562
Universal LCD driver for low multiplex rates
Table 3. Pin description …continued
Symbol
Pin
Description
V_LCD
21
LCD supply voltage
BP0 to BP3
22 to 25 LCD backplane outputs
S0 to S22,
S23 to S31
26 to 48, LCD segment outputs
1 to 9
7. Functional description
The PCF8562 is a versatile peripheral device designed to interface any
microprocessor or microcontroller with a wide variety of LCDs. It can directly drive any
static or multiplexed LCD containing up to four backplanes and up to 32 segments.
The possible display configurations of the PCF8562 depend on the number of active
backplane outputs required. A selection of display configurations is shown in Table 4. All
of these configurations can be implemented in the typical system shown in Figure 3.
Table 4. Display configurations
Number of:
7-segment numeric 14-segment numeric
Backplanes Segments Digits Indicator
symbols
Characters Indicator
symbols
4
128
16 16
8
16
3
96
12 12
6
12
2
64
8
8
4
8
1
32
4
4
2
4
Dot matrix
128 dots (4 × 32)
96 dots (3 × 32)
64 dots (2 × 32)
32 dots (1 × 32)
V_DD
R
≤
t_r
2C_b
HOST
MICRO-
PROCESSOR/
MICRO-
CONTROLLER
V_SS
SDA ₁₀
V_DD V_LCD
14
21
32 segment drives
SCL ₁₁
OSC
15
PCF8562
4 backplanes
16 17 18 19 20
A0 A1 A2 SA0 V_SS
LCD PANEL
(up to 128
elements)
001aac264
The resistance of the power lines must be kept to a minimum.
Fig 3. Typical system configuration
The host microprocessor or microcontroller maintains the 2-line I²C-bus communication
channel with the PCF8562. The internal oscillator is enabled by connecting
pin OSC to pin V_SS. The appropriate biasing voltages for the multiplexed LCD waveforms
are generated internally. The only other connections required to complete the system are
to the power supplies (V_DD, V_SS and V_LCD) and the LCD panel chosen for the application.
7.1 Power-on reset
At power-on the PCF8562 resets to the following starting conditions:
PCF8562_3
Product data sheet
Rev. 3 — 2 December 2008
© NXP B.V. 2008. All rights reserved.
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