PCA9532 Datasheet, PDF (5/29 Pages) NXP Semiconductors – 16-bit I2C LED dimmer

NXP Semiconductors
PCA9532
16-bit I²C-bus LED dimmer
6. Functional description
Refer to Figure 1 “Block diagram of PCA9532”.
6.1 Device address
Following a START condition, the bus master must output the address of the slave it is
accessing. The address of the PCA9532 is shown in Figure 5. To conserve power, no
internal pull-up resistors are incorporated on the hardware selectable address pins and
they must be pulled HIGH or LOW.
slave address
1 1 0 0 A2 A1 A0 R/W
fixed
hardware
selectable
002aac505
Fig 5. PCA9532 slave address
The last bit of the address byte defines the operation to be performed. When set to logic 1
a read is selected, while a logic 0 selects a write operation.
6.2 Control register
Following the successful acknowledgement of the slave address, the bus master will send
a byte to the PCA9532, which will be stored in the Control register.
0 0 0 AI B3 B2 B1 B0
Auto-Increment flag
register address
002aae523
Reset state: 00h
Fig 6. Control register
The lowest 4 bits are used as a pointer to determine which register will be accessed.
If the Auto-Increment (AI) flag is set, the four low order bits of the Control register are
automatically incremented after a read or write. This allows the user to program the
registers sequentially. The contents of these bits will rollover to ‘0000’ after the last
register is accessed.
When Auto-Increment flag is set (AI = 1) and a read sequence is initiated, the sequence
must start by reading a register different from the INPUT0 register
(B3 B2 B1 B0 ≠ 0 0 0 0).
Only the 4 least significant bits are affected by the AI flag. Unused bits must be
programmed with zeroes.
PCA9532_4
Product data sheet
Rev. 04 — 17 March 2009
© NXP B.V. 2009. All rights reserved.
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