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P89V52X2 Datasheet, PDF (5/57 Pages) NXP Semiconductors – 8-bit 80C51 low power 8 kB flash microcontroller with 256 B RAM, 192 B data EEPROM
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NXP Semiconductors
P89V52X2
80C51 with 256 B RAM, 192 B data EEPROM
5.2 Pin description
Table 2. Pin description
Symbol
Pin
DIP40 LQFP44
P0[0] to P0[7]
P0[0]/AD0
39
37
P0[1]/AD1
38
36
P0[2]/AD2
37
35
P0[3]/AD3
36
34
P0[4]/AD4
35
33
P0[5]/AD5
34
32
P0[6]/AD6
33
31
P0[7]/AD7
32
30
P1[0] to P1[7]
P1[0]/T2
1
40
P1[1]/T2EX
2
41
P1[2]
P1[3]
P1[4]
P1[5]
P1[6]
3
42
4
43
5
44
6
1
7
2
PLCC44
43
42
41
40
39
38
37
36
2
3
4
5
6
7
8
Type Description
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O with
internal
pull-up
I/O
I
I/O
I
I/O
I/O
I/O
I/O
I/O
Port 0: Port 0 is an 8-bit open-drain bidirectional I/O port.
Port 0 pins that have ‘1’s written to them float, and in this
state can be used as high-impedance inputs. Port 0 is also
the multiplexed low-order address and data bus during
accesses to external code and data memory. In this
application, it uses strong internal pull-ups when
transitioning to ‘1’s. External pull-ups are required as a
general purpose I/O port.
P0[0] — Port 0 bit 0.
AD0 — Address/data bit 0.
P0[1] — Port 0 bit 1.
AD1 — Address/data bit 1.
P0[2] — Port 0 bit 2.
AD2 — Address/data bit 2.
P0[3] — Port 0 bit 3.
AD3 — Address/data bit 3.
P0[4] — Port 0 bit 4.
AD4 — Address/data bit 4.
P0[5] — Port 0 bit 5.
AD5 — Address/data bit 5.
P0[6] — Port 0 bit 6.
AD6 — Address/data bit 6.
P0[7] — Port 0 bit 7.
AD7 — Address/data bit 7.
Port 1: Port 1 is an 8-bit bidirectional I/O port with internal
pull-ups. The Port 1 pins are pulled HIGH by the internal
pull-ups when ‘1’s are written to them and can be used as
inputs in this state. As inputs, Port 1 pins that are
externally pulled LOW will source current (IIL) because of
the internal pull-ups. P1[5], P1[6], P1[7] have high current
drive of 16 mA.
P1[0] — Port 1 bit 0.
T2 — External count input to Timer/Counter 2 or Clock-out
from Timer/Counter 2
P1[1] — Port 1 bit 1.
T2EX: Timer/Counter 2 capture/reload trigger and
direction control
P1[2] — Port 1 bit 2.
P1[3] — Port 1 bit 3.
P1[4] — Port 1 bit 4.
P1[5] — Port 1 bit 5.
P1[6] — Port 1 bit 6.
P89V52X2_3
Product data sheet
Rev. 03 — 4 May 2009
© NXP B.V. 2009. All rights reserved.
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