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HEF4027BP652 Datasheet, PDF (5/14 Pages) NXP Semiconductors – Dual JK flip-flop Rev. 9 — 18 November 2011
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NXP Semiconductors
HEF4027B
Dual JK flip-flop
10. Static characteristics
Table 6. Static characteristics
VSS = 0 V; VI = VSS or VDD; unless otherwise specified.
Symbol Parameter
Conditions
VDD
VIH
HIGH-level input voltage
IO < 1 A
5V
10 V
15 V
VIL
LOW-level input voltage
IO < 1 A
5V
10 V
15 V
VOH
HIGH-level output voltage
IO < 1 A
5V
10 V
15 V
VOL
LOW-level output voltage
IO < 1 A
5V
10 V
15 V
IOH
HIGH-level output current
VO = 2.5 V
5V
VO = 4.6 V
5V
VO = 9.5 V
10 V
VO = 13.5 V
15 V
IOL
LOW-level output current
VO = 0.4 V
5V
VO = 0.5 V
10 V
VO = 1.5 V
15 V
II
input leakage current
15 V
IDD
supply current
IO = 0 A
5V
10 V
15 V
CI
input capacitance
-
Tamb = 40 C Tamb = 25 C Tamb = 85 C Unit
Min Max Min Max Min Max
3.5
-
3.5
-
3.5
-V
7.0
-
7.0
-
7.0
-V
11.0
-
11.0 - 11.0 - V
-
1.5
-
1.5
-
1.5 V
-
3.0
-
3.0
-
3.0 V
-
4.0
-
4.0
-
4.0 V
4.95
-
4.95 - 4.95 - V
9.95
-
9.95 - 9.95 - V
14.95 - 14.95 - 14.95 - V
-
0.05
- 0.05 - 0.05 V
-
0.05
- 0.05 - 0.05 V
-
0.05
- 0.05 - 0.05 V
-
1.7
- 1.4 - 1.1 mA
- 0.52 - 0.44 - 0.36 mA
-
1.3
- 1.1 - 0.9 mA
-
3.6
- 3.0 - 2.4 mA
0.52
-
0.44 - 0.36 - mA
1.3
-
1.1
-
0.9
- mA
3.6
-
3.0
-
2.4
- mA
-
0.3
- 0.3 - 1.0 A
-
4.0
-
4.0
-
30 A
-
8.0
-
8.0
-
60 A
-
16.0
- 16.0 -
120 A
-
-
-
7.5
-
- pF
HEF4027B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 9 — 18 November 2011
© NXP B.V. 2011. All rights reserved.
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