74HC4052 Datasheet, PDF (5/27 Pages) NXP Semiconductors – Dual 4-channel analog multiplexer/demultiplexer

NXP Semiconductors
74HC4052; 74HCT4052
Dual 4-channel analog multiplexer/demultiplexer
7. Functional description
7.1 Function table
Table 3. Function table^[1]
Input
E
S1
S0
L
L
L
L
L
H
L
H
L
L
H
H
H
X
X
[1] H = HIGH voltage level;
L = LOW voltage level;
X = don’t care.
8. Limiting values
Channel on
nY0 and nZ
nY1 and nZ
nY2 and nZ
nY3 and nZ
none
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Voltages are referenced to V_EE = GND (ground = 0 V).
Symbol Parameter
Conditions
V_CC
supply voltage
I_IK
input clamping current
V_I < −0.5 V or V_I > V_CC + 0.5 V
I_SK
switch clamping current
V_SW < −0.5 V or V_SW > V_CC + 0.5 V
I_SW
switch current
−0.5 V < V_SW < V_CC + 0.5 V
I_EE
supply current
I_CC
supply current
I_GND
ground current
T_stg
storage temperature
P_tot
total power dissipation
T_amb = −40 °C to +125 °C
P
power dissipation
per switch
Min
[1] _−0.5
-
-
-
-
-
-
−65
[2] _-
-
Max
Unit
+11.0
V
±20
mA
±20
mA
±25
mA
±20
mA
50
mA
−50
mA
+150
°C
500
mW
100
mW
[1] To avoid drawing V_CC current out of pins nZ, when switch current flows in pins nYn, the voltage drop across the bidirectional switch must
not exceed 0.4 V. If the switch current flows into pins nZ, no V_CC current will flow out of pins nYn. In this case there is no limit for the
voltage drop across the switch, but the voltages at pins nYn and nZ may not exceed V_CC or V_EE.
[2] For DIP16 packages: above 70 °C the value of P_tot derates linearly with 12 mW/K.
For SO16 packages: above 70 °C the value of P_tot derates linearly with 8 mW/K.
For SSOP16 and TSSOP16 packages: above 60 °C the value of P_tot derates linearly with 5.5 mW/K.
For DHVQFN16 packages: above 60 °C the value of P_tot derates linearly with 4.5 mW/K.
74HC_HCT4052_6
Product data sheet
Rev. 06 — 11 January 2010
© NXP B.V. 2010. All rights reserved.
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