LH79520 Datasheet, PDF (42/59 Pages) NXP Semiconductors – System-on-Chip

LH79520
NXP Semiconductors
System-on-Chip
Color LCD Controller System Timing
Waveforms
This section contains typical output waveform dia-
grams.
STN HORIZONTAL TIMING
Figure 23 presents typical horizontal timing wave-
forms for STN panels. Figure 23 shows that the CLCDC
Clock (an input to the CLCDC) is scaled within the
CLCDC and utilized to produce the LCDDCLK output.
Figure 24 presents typical vertical timing waveforms
for STN panels.
TFT HORIZONTAL TIMING
Figure 25 presents typical horizontal timing wave-
forms for TFT panels.
TFT VERTICAL TIMING
Figure 26 presents typical vertical timing waveforms
for TFT panels.
AD-TFT AND HR-TFT HORIZONTAL TIMING
WAVEFORMS
Figure 27 presents typical horizontal timing wave-
forms for AD-TFT and HR-TFT panels. The ALI adjusts
and delays the normal TFT timing for the Row and Col-
umn driver chips integrated into AD-TFT and HR-TFT
panels. Other panels requiring the use of the ALI will
have similar timing waveforms.
AD-TFT AND HR-TFT VERTICAL TIMING
Figure 28 presents typical vertical timing wave-
forms for AD-TFT and HR-TFT panels. The power
sequencing and register information is the same
as for TFT vertical timing.
42
Rev. 01 — 16 July 2007
Preliminary data sheet