LPC54101J512UK49Z Datasheet, PDF (41/90 Pages) NXP Semiconductors – 32-bit ARM Cortex-M4/M0+ MCU; 104 kB SRAM; 512 kB flash, 3 x I2C, 2 x SPI, 4 x USART, 32-bit counter/ timers, SCTimer/PWM, 12-bit 5.0 Msamples/sec ADC

NXP Semiconductors
LPC5410x
32-bit ARM Cortex-M4/M0+ microcontroller
[5] SRAM0 and SRAM1 powered, SRAM2 powered down.
[6] See the FLASHCFG register in the LPC5410x User Manual for system clock flash access time settings.
3
Coremark score
(iterations/s) / MHz)
2.6
2.2
M4 SRAM
M4 Flash
aaa-015950
1.8
1.4
1
12
24
36
48
60
72
84
96
108
Frequency (MHz)
Fig 8.
Conditions: V_DD = 3.3 V; T_amb = 25 °C; active mode; all peripherals except one UART; BOD
disabled; SRAM0 and SRAM1 powered, SRAM2 powered down. See the FLASHCFG register in
the LPC5410x User Manual for system clock flash access time settings. Measured with Keil
uVision 5.12. Optimization level 3, optimized for time on.
12 MHz: IRC enabled; PLL disabled. 24 MHz - 100 MHz: IRC enabled; PLL enabled.
Typical CoreMark score
LPC5410x
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2.6 — 3 October 2016
© NXP B.V. 2016. All rights reserved.
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