PIP202-12M-2 Datasheet, PDF (4/20 Pages) NXP Semiconductors – DC-to-DC converter powertrain

Philips Semiconductors
PIP202-12M-2
DC-to-DC converter powertrain
When the input voltage is LOW and current is flowing in the inductor, the upper
MOSFET must be off and the lower MOSFET must be on. Current flows from the
power ground (V_SSO), through the lower MOSFET and the inductor (L_out), to the
output.
Finally, when switching between states, both MOSFETs must not be on at the same
time.
7.2 MOSFET driver function
9397 750 11943
Product data
input voltage
upper MOSFET
gate drive
lower MOSFET
gate drive
delay
delay
output voltage
03ag35
Fig 4. Input, output and gate drive waveforms of a synchronous DC-to-DC converter
output stage.
The input, output and gate drive waveforms are shown in Figure 4. When the input
voltage goes HIGH, the gate drive to the lower MOSFET immediately goes LOW. This
causes the output current to flow through the Schottky diode, connected between the
drain and source of the lower MOSFET. This causes output voltage to fall from zero to
approximately −0.5 V.
After a delay, if the input voltage is still HIGH, the gate drive to the upper MOSFET
goes HIGH. This causes the output voltage to rise to the output stage supply voltage,
V_DDO.
When the input voltage goes LOW, the gate drive to the upper MOSFET immediately
goes LOW. The output voltage falls from V_DDO, until it is clamped by the Schottky
diode at approximately −0.5 V.
After a delay, if the input voltage is still LOW, the gate drive to the lower MOSFET
goes HIGH. The lower MOSFET turns on, and the output voltage rises from −0.5 V to
zero.
7.3 Bootstrap diode
A bootstrap diode is integrated into the design of the PIP202-12M between V_DDC and
CB.
Rev. 02 — 24 November 2003
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
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