English
Language : 

PCA9620 Datasheet, PDF (4/71 Pages) NXP Semiconductors – Universal LCD driver for low multiplex rates
NXP Semiconductors
PCA9620
Universal LCD driver for low multiplex rates
6.2 Pin description
Table 3. Pin description
Symbol
Pin
Type
Description
S0 to S59
61 to 80 and output
1 to 40
LCD segment
BP0 to BP7 41 to 48
output
LCD backplane
VLCD
VDD2
VDD1
VSS
T1 to T3
CLK
49
50
51
52
53 to 55
56
supply/output[1] LCD supply voltage
supply
supply voltage 2 (charge pump)
supply
supply voltage 1 (analog and digital)
supply
ground supply voltage
input
input/output
test pins; must be tied to VSS in applications
internal oscillator output, external oscillator input
A0, A1
57, 58
input
I2C-bus slave address selection bit
SCL
59
input
I2C-bus serial clock
SDA
60
input/output
I2C-bus serial data
[1] When the internal VLCD generation is used, this pin drives the VLCD voltage. In this case pin VLCD
is an output. When the external supply is requested then pin VLCD is an input and VLCD can be
supplied to it. In this case the internal charge pump must be disabled (see Table 8 on page 7).
PCA9620
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 9 December 2010
© NXP B.V. 2010. All rights reserved.
4 of 71