LPC2470_11 Datasheet, PDF (4/89 Pages) NXP Semiconductors – Flashless 16-bit/32-bit microcontroller; Ethernet, CAN, LCD, USB 2.0 device/host/OTG

NXP Semiconductors
5. Block diagram
LPC2470
Flashless 16-bit/32-bit microcontroller
P0, P1, P2,
P3, P4
MII/RMII
EINT3 to EINT0
P0, P2
2 × CAP0/CAP1/
CAP2/CAP3
4 × MAT2/MAT3,
2 × MAT0,
3 × MAT1
6 × PWM0/PWM1
1 × PCAP0,
2 × PCAP1
P0, P1
8 × AD0
AOUT
VBAT
power domain 2
RTCX1
RTCX2
ALARM
TMS TDI trace signals
TRST TCK TDO
EXTIN0 DBGEN
XTAL1
XTAL2
V_DD(3V3)
V_DDA
RESET
LPC2470
HIGH-SPEED
GPIO
160 PINS
TOTAL
64 kB
SRAM
INTERNAL
SRAM
CONTROLLER
TEST/DEBUG
INTERFACE
ARM7TDMI-S
PLL
system
clock
SYSTEM
FUNCTIONS
INTERNAL RC
OSCILLATOR
VIC
16 kB
SRAM
EXTERNAL
MEMORY
CONTROLLER
AHB2
AHB
BRIDGE
AHB
BRIDGE
AHB1
VREF
V_SSA, V_SSCORE, V_SSIO
V_{DD(DCDC)(3V3)}
D[31:0]
A[23:0]
control lines
ETHERNET
MAC WITH
DMA
16 kB
SRAM
MASTER AHB TO SLAVE
PORT AHB BRIDGE PORT
AHB TO
APB BRIDGE
EXTERNAL INTERRUPTS
CAPTURE/COMPARE
TIMER0/TIMER1/
TIMER2/TIMER3
PWM0, PWM1
LEGACY GPI/O
64 PINS TOTAL
A/D CONVERTER
D/A CONVERTER
2 kB BATTERY RAM
USB DEVICE/
HOST/OTG WITH
4 kB RAM AND DMA
GP DMA
CONTROLLER
LCD INTERFACE
WITH DMA
I²S INTERFACE
SPI, SSP0 INTERFACE
SSP1 INTERFACE
SD/MMC CARD
INTERFACE
UART0, UART2, UART3
V_BUS
port1
port2
8 × LCD control
LCDVD[23:0]
LCDCLKIN
3 × I2SRX
3 × I2STX
SCK, SCK0
MOSI, MOSI0
MISO, MISO0
SSEL, SSEL0
SCK1
MOSI1
MISO1
SSEL1
MCICLK, MCIPWR
MCICMD,
MCIDAT[3:0]
TXD0, TXD2, TXD3
RXD0, RXD2, RXD3
RTC
OSCILLATOR
REAL-
TIME
CLOCK
WATCHDOG TIMER
SYSTEM CONTROL
UART1
CAN1, CAN2
I²C0, I²C1, I²C2
TXD1, DTR1, RTS1
RXD1, DSR1, CTS1,
DCD1, RI1
RD1, RD2
TD1, TD2
SCL0, SCL1, SCL2
SDA0, SDA1, SDA2
Fig 1. LPC2470 block diagram
002aad317
LPC2470
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 14 February 2011
© NXP B.V. 2011. All rights reserved.
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