ISP1102A Datasheet, PDF (4/25 Pages) NXP Semiconductors – Advanced Universal Serial Bus transceiver

NXP Semiconductors
6. Pinning information
6.1 Pinning
ISP1102A
Advanced USB transceiver
OE_N 1
13 VREG3V3
RCV 2
VP/VPO 3
VM/VMO 4
ISP1102AW
12 n.c.
11 n.c.
10 DP
SUSPEND 5
9 DM
004aaa844
Transparent top view
Fig 2. Pin configuration HBCC16 (top view)
6.2 Pin description
Table 2. Pin description
Symbol^[1]
Pin
OE_N
1
RCV
2
VP/VPO
3
VM/VMO
4
SUSPEND
5
n.c.
6
Type^[2]
I
O
I/O
I/O
I
-
Description
input for output enable (CMOS level with respect to V_CC(IO), active LOW); enables
the transceiver to transmit data on the USB bus
input pad; push pull; CMOS
differential data receiver output (CMOS level with respect to V_CC(IO)); driven LOW
when input SUSPEND is HIGH; the output state of RCV is preserved and stable
during an SE0 condition
output pad; push pull; 4 mA output drive; CMOS
single-ended DP receiver output VP (CMOS level with respect to V_CC(IO)); for
external detection of SE0, error conditions, speed of connected device; this pin
also acts as drive data input VPO; see Table 3 and Table 4
bidirectional pad; push-pull input; 3-state output; 4 mA output drive; CMOS
single-ended DM receiver output VM (CMOS level with respect to V_CC(IO)); for
external detection of SE0, error conditions, speed of connected device; this pin
also acts as drive data input VMO; see Table 3 and Table 4
bidirectional pad; push-pull input; 3-state output; 4 mA output drive; CMOS
suspend input (CMOS level with respect to V_CC(IO)); a HIGH level enables
low-power state while the USB bus is inactive and drives output RCV to a LOW
level
input pad; push pull; CMOS
not connected
ISP1102A_1
Product data sheet
Rev. 01 — 15 February 2007
© NXP B.V. 2007. All rights reserved.
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