74LVC1G74 Datasheet, PDF (4/25 Pages) NXP Semiconductors – Single D-type flip-flop with set and reset; positive edge trigger

NXP Semiconductors
74LVC1G74
Single D-type flip-flop with set and reset; positive edge trigger
6. Pinning information
6.1 Pinning
74LVC1G74
CP 1
D2
Q3
GND 4
8 V_CC
7 SD
6 RD
5Q
001aab659
Fig 4. Pin configuration SOT505-2 and SOT765-1
74LVC1G74
CP 1
8 V_CC
D2
7 SD
Q3
6 RD
GND 4
5Q
001aab658
Transparent top view
Fig 5. Pin configuration SOT833-1, SOT1089,
SOT1116 and SOT1203
CP 1
8 V_CC
D2
Q3
74LVC1G74
7 SD
6 RD
GND 4
5Q
001aah948
Transparent top view
Fig 6. Pin configuration SOT996-2
terminal 1
index area
74LVC1G74
SD 1
7 CP
RD 2
6D
Q3
5Q
001aaf641
Transparent top view
Fig 7. Pin configuration SOT902-2
74LVC1G74
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 11 — 4 June 2012
© NXP B.V. 2012. All rights reserved.
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