74HCT4066D-T Datasheet, PDF (4/25 Pages) NXP Semiconductors – Quad single-pole single-throw analog switch

NXP Semiconductors
74HC4066; 74HCT4066
Quad single-pole single-throw analog switch
6. Functional description
Table 3. Function table^[1]
Input nE
L
H
[1] H = HIGH voltage level;
L = LOW voltage level.
7. Limiting values
Switch
OFF
ON
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Max Unit
V_CC
I_IK
I_SK
I_SW
I_CC
I_GND
T_stg
P_tot
supply voltage
input clamping current
switch clamping current
switch current
supply current
ground current
storage temperature
total power dissipation
V_I < 0.5 V or V_I > V_CC + 0.5 V
V_SW < 0.5 V or V_SW > V_CC + 0.5 V
V_SW = 0.5 V to V_CC + 0.5 V
T_amb = 40 C to +125 C
DIP14 package
0.5
-
-
[1] _-
-
-
65
[2]
+11.0 V
20
mA
20
mA
25
mA
50
mA
50
mA
+150 C
-
750
SO14, (T)SSOP14 and DHVQFN14
packages
-
500
P
power dissipation
per switch
-
100
mW
[1] To avoid drawing V_CC current out of terminal Z, when switch current flows in terminals Yn, the voltage drop across the bidirectional
switch must not exceed 0.4 V. If the switch current flows into terminal Z, no V_CC current will flow out of terminals Yn. In this case there is
no limit for the voltage drop across the switch, but the voltages at Yn and Z may not exceed V_CC or GND.
[2] For DIP14 package: P_tot derates linearly with 12 mW/K above 70 C.
For SO14 package: P_tot derates linearly with 8 mW/K above 70 C.
For (T)SSOP14 packages: P_tot derates linearly with 5.5 mW/K above 60 C.
For DHVQFN14 packages: P_tot derates linearly with 4.5 mW/K above 60 C.
74HC_HCT4066
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 2 April 2013
© NXP B.V. 2013. All rights reserved.
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