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74HC164D Datasheet, PDF (4/20 Pages) NXP Semiconductors – 8-bit serial-in, parallel-out shift register
NXP Semiconductors
74HC164; 74HCT164
8-bit serial-in, parallel-out shift register
5.2 Pin description
Table 2. Pin description
Symbol
Pin
DSA
1
DSB
2
Q0 to Q7
3, 4, 5, 6, 10, 11, 12, 13
GND
7
CP
8
MR
9
VCC
14
6. Functional description
Description
data input
data input
output
ground (0 V)
clock input (LOW-to-HIGH, edge-triggered)
master reset input (active LOW)
positive supply voltage
Table 3. Function table[1]
Operating
Input
modes
MR
CP
Reset (clear)
L
X
Shift
H

H

H

H

DSA
X
l
l
h
h
DSB
X
l
h
l
h
Output
Q0
L
L
L
L
H
Q1 to Q7
L to L
q0 to q6
q0 to q6
q0 to q6
q0 to q6
[1] H = HIGH voltage level
h = HIGH voltage level one set-up time prior to the LOW-to-HIGH clock transition
L = LOW voltage level
I = LOW voltage level one set-up time prior to the LOW-to-HIGH clock transition
q = lower case letters indicate the state of the referenced input one set-up time prior to the LOW-to-HIGH clock transition
 = LOW-to-HIGH clock transition
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min Max Unit
VCC
IIK
IOK
IO
ICC
IGND
Tstg
supply voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
VI < 0.5 V or VI > VCC + 0.5 V
VO < 0.5 V or VO > VCC + 0.5 V
0.5 V < VO < VCC + 0.5 V
0.5
[1] -
[1] -
-
-
50
65
+7
V
20 mA
20 mA
25 mA
50
mA
-
mA
+150 C
74HC_HCT164
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 13 June 2013
© NXP B.V. 2013. All rights reserved.
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