74HC157_10 Datasheet, PDF (4/18 Pages) NXP Semiconductors – Quad 2-input multiplexer

NXP Semiconductors
74HC157; 74HCT157
Quad 2-input multiplexer
5.2 Pin description
Table 2. Pin description
Symbol
Pin
S
1
1I0 to 4I0
2, 5, 11, 14
1I1 to 4I1
3, 6, 10, 13
1Y to 4Y
4, 7, 9, 12
GND
8
E
15
V_CC
16
Description
common data select input
data inputs from source 0
data inputs from source 1
multiplexer outputs
ground (0 V)
enable input (active LOW)
supply voltage
6. Functional description
Table 3. Function table^[1]
Input
Output
E
S
nI0
nI1
nY
H
X
X
X
L
L
L
L
X
L
L
L
H
X
H
L
H
X
L
L
L
H
X
H
H
[1] H = HIGH voltage level;
L = LOW voltage level;
X = don’t care.
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min Max Unit
V_CC
I_IK
I_OK
I_O
I_CC
I_GND
T_stg
P_tot
supply voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
SO16 package
V_I < 0.5 V or V_I > V_CC + 0.5 V
V_O < 0.5 V or V_O > V_CC + 0.5 V
V_O = 0.5 V to (V_CC + 0.5 V)
T_amb = 40 C to +125 C
0.5 +7
V
-
20 mA
-
20 mA
-
25 mA
-
+50 mA
-
50 mA
65 +150 C
[1] _-
500 mW
TSSOP16 package
[2] _-
500 mW
DHVQFN16 package
[3] _-
500 mW
[1] P_tot derates linearly with 8 mW/K above 70 C.
[2] P_tot derates linearly with 5.5 mW/K above 60 C.
74HC_HCT157
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 31 December 2010
© NXP B.V. 2010. All rights reserved.
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