TDA19989 Datasheet, PDF (37/47 Pages) NXP Semiconductors – 150 MHz pixel rate HDMI 1.3 transmitter with 3 × 8-bit video inputs, HDCP and CEC support

NXP Semiconductors
TDA19989
HDMI 1.3 transmitter with HDCP and CEC support
13. Dynamic characteristics
Table 31. Timing characteristics
T_amb = −20 °C to +85 °C; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Clock input: pin VCLK
f_clk(max)
maximum clock frequency -
-
-
t_su(D)
data input set-up time
see Figure 18 and 19
1.5
-
t_h(D)
data input hold time
see Figure 18 and 19
1
-
δ_clk
clock duty cycle
positive edge
[1] ₃₀
50
f_clk
clock frequency
CEC
-
12
DDC-bus: pins DSDA, DSCL (5 V tolerant) master bus^[2]
148.5
-
-
70
-
f_SCL
SCL frequency
Standard mode
C_i
capacitance for each I/O pin
I²C-bus: pins CSCL, CSDA (5 V tolerant) slave bus^[2]
-
-
100
-
7
-
f_SCL
SCL frequency
Standard mode
Fast mode
-
-
100
-
-
400
t_stretch
stretch time
CEC input/output^[3]
CEC
-
80
-
t_r
rise time
t_f
fall time
TMDS output pins: TXC− and TXC+
10 % to 90 %
10 % to 90 %
-
-
50
-
-
2
f_clk(max)
maximum clock frequency on the TMDS link
TMDS output pins: TX0−, TX0+, TX1−, TX1+, TX2− and TX2+
-
-
148.5
f_clk(max)
maximum clock frequency
-
-
1.485
[1] δ_clk = t_clk(H) / (t_clk(H) + t_clk(L)).
[2] See Section 7.1 and refer to the I²C-bus specification version 2.1 (document order number 9398 393 40011).
[3] For details about CEC electrical specification, see HDMI 1.3a specification.
Unit
MHz
ns
ns
%
MHz
kHz
pF
kHz
kHz
μs
μs
μs
MHz
GHz
TDA19989_1
Preliminary data sheet
Rev. 01 — 15 February 2010
© NXP B.V. 2010. All rights reserved.
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