LPC1311_11 Datasheet, PDF (34/73 Pages) NXP Semiconductors – 32-bit ARM Cortex-M3 microcontroller; up to 32 kB flash and 8 kB SRAM; USB device

NXP Semiconductors
LPC1311/13/42/43
32-bit ARM Cortex-M3 microcontroller
Table 7. Static characteristics …continued
T_amb = 40 C to +85 C, unless otherwise specified.
Symbol Parameter
Conditions
I_pu
pull-up current
V_I = 0 V
V_DD < V_I < 5 V
I²C-bus pins (PIO0_4 and PIO0_5); see Figure 20
V_IH
HIGH-level input
voltage
V_IL
LOW-level input voltage
V_hys
hysteresis voltage
I_OL
LOW-level output
current
V_OL = 0.4 V; 2.0 V  V_DD  3.6 V
I²C-bus pins configured as
standard mode pins
I²C-bus pins configured as
Fast-mode Plus pins
I_LI
input leakage current
Oscillator pins
V_I = V_DD
V_I = 5 V
V_i(xtal) crystal input voltage
V_o(xtal) crystal output voltage
USB pins (LPC1342/43 only)
I_OZ
OFF-state output
current
0 V < V_I < 3.3 V
V_BUS
V_DI
bus supply voltage
differential input
sensitivity voltage
(D+)  (D)
V_CM
differential common
includes V_DI range
mode voltage range
V_th(rs)se single-ended receiver
switching threshold
voltage
V_OL
V_OH
C_trans
Z_DRV
LOW-level output
voltage
for low-/full-speed;
R_L of 1.5 k to 3.6 V
HIGH-level output
voltage
driven; for low-/full-speed;
R_L of 15 k to GND
transceiver capacitance pin to GND
driver output
impedance for driver
which is not high-speed
capable
with 33  series resistor; steady state
drive
Min
15
0
0.7V_DD
-
-
3.5
20
[16] _-
-
0.5
0.5
[17] _-
[17] _-
[17] _0.2
[17] _0.8
[17] _0.8
[17] _-
[17] _2.8
[17] _-
[18][17] ₃₆
Typ^[1]
50
0
Max
85
0
-
-
-
0.05V_DD
-
0.3V_DD
-
-
-
2
10
+1.8
+1.8
-
-
-
-
-
-
4
22
+1.95
+1.95
10
5.25
-
2.5
2.0
-
0.18
-
3.5
-
20
-
44.1
Unit
A
A
V
V
V
mA
mA
A
A
V
V
A
V
V
V
V
V
V
pF

[1] Typical ratings are not guaranteed. The values listed are at room temperature (25 C), nominal supply voltages.
[2] For LPC1342 and LPC1343 only: For USB operation 3.0 V  V_DD  3.6 V. Guaranteed by design.
[3] IRC enabled; system oscillator disabled; system PLL disabled.
[4] I_DD measurements were performed with all pins configured as GPIO outputs driven LOW and pull-up resistors disabled.
[5] BOD disabled.
[6] All peripherals disabled in the SYSAHBCLKCTRL register. Peripheral clocks to UART, SSP, trace clock, and SysTick timer disabled in
the syscon block.
LPC1311_13_42_43
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 20 June 2011
© NXP B.V. 2011. All rights reserved.
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