PCA85133 Datasheet, PDF (32/44 Pages) NXP Semiconductors – Universal LCD driver for low multiplex rates

NXP Semiconductors
PCA85133
Universal LCD driver for low multiplex rates
BP0
SYNC
BP0
(1/2 bias)
BP0
(1/3 bias)
SYNC
1
T_fr = _ffr
(a) static drive mode.
(b) 1:2 multiplex drive mode.
BP0
(1/3 bias)
SYNC
(c) 1:3 multiplex drive mode.
BP0
(1/3 bias)
SYNC
(d) 1:4 multiplex drive mode.
mgl755
Fig 21. Synchronization of the cascade for the various PCA85133 drive modes
The contact resistance between the SYNC pins of cascaded devices must be controlled. If
the resistance is too high, then the device will not be able to synchronize properly. This is
particularly applicable to COG applications. Table 19 shows the limiting values for contact
resistance.
Table 19. SYNC contact resistance
Number of devices
2
3 to 5
6 to 10
11 to 16
Maximum contact resistance
6000 Ω
2200 Ω
1200 Ω
700 Ω
PCA85133_1
Product data sheet
Rev. 1 — 23 October 2009
© NXP B.V. 2009. All rights reserved.
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