PCA9306AMUTCG Datasheet, PDF (3/12 Pages) NXP Semiconductors – Dual Bidirectional I2C-bus and SMBus Voltage-Level Translator

PCA9306
PIN ASSIGNMENTS
Figure 2. TSSOP−8 / US8 Pinouts
Figure 3. UQFN8 Pinout (Top Thru View)
Figure 4. UDFN8 Pinout (Top Thru View)
Table 1. PIN DESCRIPTION
Pin
Description
GND
Ground
VREF1
Low−voltage side reference supply voltage for SCL1 and SDA1
SCL1
Serial clock, low−voltage side; connect to VREF1 through a pull−up resistor
SDA1
Serial data, low−voltage side; connect to VREF1 through a pull−up resistor
SDA2
Serial data, high−voltage side; connect to VREF2 through a pull−up resistor
SCL2
Serial clock, high−voltage side; connect to VREF2 through a pull−up resistor
VREF2
High−voltage side reference supply voltage for SCL2 and SDA2
EN
Switch enable input; connect to VREF2 and pull−up through a high resistor
Table 2. FUNCTION TABLE
Input EN (Note 1)
Function
Low
Disconnect
High
SCL1 = SCL2; SDA1 = SDA2
1. EN is controlled by the V_bias(ref)(2) logic levels and should be at least 1 V higher than V_ref(1) for best translator operation.
http://onsemi.com
3