PBSS305PX Datasheet, PDF (3/15 Pages) NXP Semiconductors – 80 V, 4.0 A PNP low VCEsat (BISS) transistor

NXP Semiconductors
PBSS305PX
80 V, 4.0 A PNP low V_CEsat (BISS) transistor
5. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
V_CBO
V_CEO
V_EBO
I_C
I_CM
P_tot
collector-base voltage
collector-emitter voltage
emitter-base voltage
collector current
peak collector current
total power dissipation
open emitter
-
open base
-
open collector
-
-
single pulse;
t_p ≤ 1 ms
T_amb ≤ 25 °C
-
[1] _-
[2] _-
[3] _-
T_j
junction temperature
-
T_amb
ambient temperature
−65
T_stg
storage temperature
−65
Max Unit
−80
V
−80
V
−5
V
−4
A
−8
A
0.6
W
1.65 W
2.1
W
150
°C
+150 °C
+150 °C
[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 6 cm².
[3] Device mounted on a ceramic PCB, Al₂O₃, standard footprint.
2.5
P_tot
(W)
(1)
2.0
(2)
1.5
006aaa556
1.0
(3)
0.5
0
−75
−25
25
75
(1) Ceramic PCB, Al₂O₃, standard footprint
(2) FR4 PCB, mounting pad for collector 6 cm²
(3) FR4 PCB, standard footprint
Fig 1. Power derating curves
125
175
T_amb (°C)
PBSS305PX_2
Product data sheet
Rev. 02 — 8 December 2009
© NXP B.V. 2009. All rights reserved.
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