74AVCH1T45_09 Datasheet, PDF (3/22 Pages) NXP Semiconductors – Dual supply translating transceiver; 3-state

NXP Semiconductors
74AVCH1T45
Dual supply translating transceiver; 3-state
6. Pinning information
6.1 Pinning
74AVCH1T45
V_CC(A) 1
GND 2
6 V_CC(B)
5 DIR
A3
4B
001aag887
Fig 3. Pin configuration SOT363
74AVCH1T45
V_CC(A) 1
6 V_CC(B)
GND 2
5 DIR
A3
4B
001aag888
Transparent top view
Fig 4. Pin configuration SOT886
6.2 Pin description
Table 3.
Symbol
V_CC(A)
GND
A
B
DIR
V_CC(B)
Pin description
Pin
1
2
3
4
5
6
7. Functional description
Description
supply voltage port A and DIR
ground (0 V)
data input or output
data input or output
direction control
supply voltage port B
Table 4. Function table^[1]
Supply voltage
Input
V_CC(A), V_CC(B)
0.8 V to 3.6 V
DIR^[3]
L
0.8 V to 3.6 V
H
GND^[4]
X
Input/output^[2]
A
A=B
input
Z
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
[2] The input circuit of the data I/O is always active.
[3] The DIR input circuit is referenced to V_CC(A).
[4] If at least one of V_CC(A) or V_CC(B) is at GND level, the device goes into Suspend mode.
B
input
B=A
Z
74AVCH1T45_2
Product data sheet
Rev. 02 — 5 May 2009
© NXP B.V. 2009. All rights reserved.
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