74AUP1G97_11 Datasheet, PDF (3/22 Pages) NXP Semiconductors – Low-power configurable multiple function gate

NXP Semiconductors
74AUP1G97
Low-power configurable multiple function gate
6. Pinning information
6.1 Pinning
74AUP1G97
B1
6C
GND 2
5 V_CC
A3
4Y
001aad999
Fig 2. Pin configuration SOT363
74AUP1G97
B1
6C
GND 2
5 V_CC
A3
4Y
001aae000
Transparent top view
Fig 3. Pin configuration SOT886
74AUP1G97
B1
6C
GND 2
5 V_CC
A3
4Y
001aae001
Transparent top view
Fig 4. Pin configuration SOT891,
SOT1115 and SOT1202
6.2 Pin description
Table 3.
Symbol
B
GND
A
Y
V_CC
C
Pin description
Pin
1
2
3
4
5
6
Description
data input
ground (0 V)
data input
data output
supply voltage
data input
7. Functional description
Table 4. Function table^[1]
Input
Output
C
B
A
Y
L
L
L
L
L
L
H
L
L
H
L
H
L
H
H
H
H
L
L
L
H
L
H
H
H
H
L
L
H
H
H
H
[1] H = HIGH voltage level;
L = LOW voltage level.
74AUP1G97
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 10 January 2011
© NXP B.V. 2011. All rights reserved.
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