74AHCT08PW112 Datasheet, PDF (3/14 Pages) NXP Semiconductors – Quad 2-input AND gate Rev. 03 — 14 November 2007

NXP Semiconductors
74AHC08; 74AHCT08
Quad 2-input AND gate
5.2 Pin description
Table 2.
Symbol
1A
1B
1Y
2A
2B
2Y
GND
3Y
3A
3B
4Y
4A
4B
V_CC
Pin description
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Description
data input
data input
data output
data input
data input
data output
ground (0 V)
data output
data input
data input
data output
data input
data input
supply voltage
6. Functional description
Table 3. Function selection^[1]
Input
nA
nB
L
X
X
L
H
H
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care
7. Limiting values
Output
nY
L
L
H
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min Max Unit
V_CC
supply voltage
V_I
input voltage
I_IK
input clamping current
I_OK
output clamping current
I_O
output current
V_I < −0.5 V
V_O < −0.5 V or V_O > V_CC + 0.5 V
V_O = −0.5 V to (V_CC + 0.5 V)
−0.5 +7.0 V
−0.5 +7.0 V
[1] _−20
-
mA
[1] _-
±20
mA
-
±25
mA
I_CC
I_GND
T_stg
supply current
ground current
storage temperature
-
75
mA
−75 -
mA
−65 +150 °C
74AHC_AHCT08_3
Product data sheet
Rev. 03 — 14 November 2007
© NXP B.V. 2007. All rights reserved.
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