English
Language : 

PCF8534A Datasheet, PDF (27/41 Pages) NXP Semiconductors – Universal LCD driver for low multiplex rates
PCF8534A NXP Semiconductors
9. Limiting values
Table 18. Limiting values
In accordance with the Absolute Maximum
Symbol Parameter
VDD
VLCD
supply voltage
LCD supply voltage
RatinUgnSivyesCrtesomanld(LIiEtiCoCDn6Ds0dR1ArVM−3iF0vSi4T.nSe5)D.r−RfA0Do.FR5rTAlDFoTRwADM67FR..ma55TDAxDRFuTRAlAtFDiTFRpTADlUVVeDFRTnRxDAAiRFDtrTFARaTFADtTDFeRTRDAsARDFTFDARTRFADTADFRTFRDATADRF
VI
input voltage on pins SDA,
SCL, CLK, SYNC, SA0, OSC
and A0 to A2
−0.5
6.5
V
VO
output voltage on pins SDA,
SCL, CLK, SYNC, SA0, OSC
and A0 to A2
−0.5
7.5
V
IDD
supply current
ILCD
LCD supply current
ISS
ground supply current
II
input current
IO
output current
−50
+50
mA
−50
+50
mA
−50
+50
mA
−10
+10
mA
−10
+10
mA
PTOT
total power dissipation
-
400
mW
POUT
TSTG
VESD
power dissipation per output
storage temperature
electrostatic discharge voltage HBM
MM
-
100
mW
−65
+150 °C
±2000 V
±200 V
CDM
±2000 V
ILU
latch-up current
100
mA
10. Static characteristics
Table 19. Static characteristics
VDD = 1.8 V to 5.5 V; VSS = 0 V; VLCD = 2.5 V to 6.5 V; TAMB = −40 °C to +85 °C; unless otherwise specified
Symbol Parameter
Conditions
Min
Typ
Max
Supplies
VDD
VLCD
IDD
ILCD
Logic
supply voltage
LCD supply voltage
supply current
LCD supply current
fCLK = 1536 Hz
fCLK = 1536 Hz
1.8
-
5.5
2.5
-
6.5
[1] -
8
20
[1] -
24
60
VI
Input voltage
VIL
LOW-level input voltage on
pins CLK, SYNC, OSC, A0 to
A2 and SA0
VSS − 0.5
VSS
-
VDD + 0.5
0.3 VDD
VIH
HIGH-level input voltage on
pins CLK, SYNC, OSC, A0 to
A2 and SA0
0.7 VDD -
VDD
VPOR
power-on reset voltage
1.0
1.3
1.6
Unit
V
V
μA
μA
V
V
V
V
PCF8534A_0
Product data sheet
Rev. 00.90 — 4 February 2008
© NXP B.V. 2008. All rights reserved.
27 of 41