PCF85162 Datasheet, PDF (26/46 Pages) NXP Semiconductors – Universal LCD driver for low multiplex rates

NXP Semiconductors
PCF85162
Universal LCD driver for low multiplex rates
8.5 I²C-bus controller
The PCF85162 acts as an I²C-bus slave receiver. It does not initiate I²C-bus transfers or
transmit data to an I²C-bus master receiver. The only data output from the PCF85162 are
the acknowledge signals of the selected devices. Device selection depends on the
I²C-bus slave address, on the transferred command data and on the hardware
subaddress.
In single device applications, the hardware subaddress inputs A0, A1, and A2 are
normally tied to V_SS which defines the hardware subaddress 0. In multiple device
applications A0, A1, and A2 are tied to V_SS or V_DD using a binary coding scheme, so that
no two devices with a common I²C-bus slave address have the same hardware
subaddress.
8.6 Input filters
To enhance noise immunity in electrical adverse environments, RC low-pass filters are
provided on the SDA and SCL lines.
8.7 I²C-bus protocol
Two I²C-bus slave addresses (0111 000 and 0111 001) are used to address the
PCF85162. The entire I²C-bus slave address byte is shown in Table 16.
Table 16. I²C slave address byte
Slave address
Bit
7
6
5
4
3
2
1
0
MSB
LSB
0
1
1
1
0
0
SA0
R/W
The PCF85162 is a write-only device and will not respond to a read access, therefore bit 0
should always be logic 0. Bit 1 of the slave address byte, that a PCF85162 will respond to,
is defined by the level tied to its SA0 input (V_SS for logic 0 and V_DD for logic 1).
Having two reserved slave addresses allows the following on the same I²C-bus:
• Up to 16 PCF85162 for very large LCD applications
• The use of two types of LCD multiplex drive modes
The I²C-bus protocol is shown in Figure 17. The sequence is initiated with a START
condition (S) from the I²C-bus master which is followed by one of two possible PCF85162
slave addresses available. All PCF85162 whose SA0 inputs correspond to bit 0 of the
slave address respond by asserting an acknowledge in parallel. This I²C-bus transfer is
ignored by all PCF85162 whose SA0 inputs are set to the alternative level.
PCF85162
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 16 June 2011
© NXP B.V. 2011. All rights reserved.
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