PCA9634 Datasheet, PDF (24/38 Pages) NXP Semiconductors – 8-bit Fm+ I2C-bus LED driver

NXP Semiconductors
10. Application design-in information
PCA9634
8-bit Fm+ I²C-bus LED driver
V_DD = 2.5 V, 3.3 V or 5.0 V
5V
12 V
I²C-BUS/SMBus
MASTER
SDA
SCL
OE
10 kΩ 10 kΩ
10 kΩ⁽¹⁾
SDA
SCL
OE
V_DD
LED0
LED1
LED2
LED3
PCA9634
5V
A0
A1
A2
A3
LED4
A4
A5
LED5
A6
LED6
V_SS
LED7
002aac137
12 V
I²C-bus address = 0010 101X.
All of the 8 LEDn outputs configurable as either open-drain or totem pole. Mixing of configurations is not possible.
(1) OE requires pull-up resistor if control signal from the master is open-drain.
Fig 18. Typical application
Question 1: What kind of edge rate control is there on the outputs?
• The typical edge rates depend on the output configuration, supply voltage, and the
applied load. The outputs can be configured as either open-drain NMOS or
totem-pole outputs. If the customer is using the part to directly drive LEDs, they
should be using it in an open-drain NMOS, if they are concerned about the maximum
ISS and ground bounce. The edge rate control was designed primarily to slow down
the turn-on of the output device; it turns off rather quickly (~1.5 ns). In simulation, the
typical turn-on time for the open-drain NMOS was ~14 ns (V_DD = 3.6 V; C_L = 50 pF;
R_PU = 500 Ω).
Question 2: Is ground bounce possible?
• Ground bounce is a possibility, especially if all 16 outputs are changed at full current
(25 mA each). There is a fair amount of decoupling capacitance on chip (~50 pF),
which is intended to suppress some of the ground bounce. The customer will need to
determine if additional decoupling capacitance externally placed as close as
physically possible to the device is required.
PCA9634_6
Product data sheet
Rev. 06 — 12 September 2008
© NXP B.V. 2008. All rights reserved.
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