PCF2116CU Datasheet, PDF (23/64 Pages) NXP Semiconductors – LCD controller/drivers

Table 3 Instructions (note 1)
INSTRUCTION RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
DESCRIPTION
NOP
0 0 0 0 0 0 0 0 0 0 No operation.
Clear display
0 0 0 0 0 0 0 0 0 1 Clears entire display and sets DDRAM
address 0 in Address Counter.
Return Home
0 0 0 0 0 0 0 0 1 0 Sets DDRAM address 0 in Address Counter.
Also returns shifted display to original position.
DDRAM contents remain unchanged.
Entry mode set 0 0 0 0 0 0 0 1 I/D S Sets cursor move direction and specifies shift
of display. These operations are performed
during data write and read.
Display control 0 0 0 0 0 0 1 D C B Sets entire display on/off (D), cursor on/off (C)
and blink of cursor position character (B).
Cursor/display
shift
0 0 0 0 0 1 S/C R/L 0 0 Moves cursor and shifts display without
changing DDRAM contents.
Function set
0 0 0 0 1 DL N M G 0 Sets interface data length (DL), number of
display lines (N, M) and voltage generator
control (G).
Set CGRAM
address
0001
A_CG
Sets CGRAM address.
Set DDRAM
address
001
A_DD
Sets DDRAM address.
Read busy flag 0 1 BF
and address
A_C
Reads Busy Flag (BF) indicating internal
operation is being performed and reads
Address Counter contents.
Read data
11
read data
Reads data from CGRAM or DDRAM.
Write data
10
write data
Writes data to CGRAM or DDRAM.
REQUIRED
CLOCK
CYCLES⁽²⁾
0
165
3
3
3
3
3
3
3
0
3
3
Notes
1. In the I²C-bus mode the DL bit is don't care. 8-bit mode is assumed.
In the I²C-bus mode a control byte is required when RS or R/W is changed; control byte: Co, RS, R/W, 0, 0, 0, 0, 0; command byte: DB7 to DB0.
2. Example: f_osc = 150 kHz, T_cy = -f-_o--1-_s---_c = 6.67 µs; 3 cycles = 20 µs, 165 cycles = 1.1 ms.