DAC1201D125 Datasheet, PDF (22/26 Pages) NXP Semiconductors – Dual 12-bit DAC, up to 125 Msps

NXP Semiconductors
DAC1201D125
Dual 12-bit DAC, up to 125 Msps
10.10 Application diagram
RL
AGND
AGND
RL
AGND
100 Ω
AGND
1.5
kΩ 100
1.5
nF
kΩ
AGND
100 Ω
3.3 V
AGND
48 47 46 45 44 43 42 41 40 39 38 37
DA11
n.c.
1
36
DA10
2
n.c.
35
DA9
3
DB0
34
DA8 ₄
33 ^DB1
DA7
5
DB2
32
DA6
6
DA5 ₇
DAC1201D125
DB3
31
30 ^DB4
DA4
8
DB5
29
DA3
9
DB6
28
DA2
10
DB7
27
DA1 ₁₁
26 ^DB8
DA0
12
DB9
25
13 14 15 16 17 18 19 20 21 22 23 24
100 nF
100 nF
3.3 V
DGND
DGND
3.3 V
001aaj125
Dual-port mode (MODE = HIGH)
DAC active (PWD = LOW)
Independent channel gain (GAINCTRL = LOW)
Fig 23. Application diagram
DAC1201D125_1
Product data sheet
Rev. 01 — 27 November 2008
© NXP B.V. 2008. All rights reserved.
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