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74AVCH2T45 Datasheet, PDF (22/31 Pages) NXP Semiconductors – Dual-bit, dual-supply voltage level translator/transceiver; 3-state
NXP Semiconductors
74AVCH2T45
Dual-bit, dual-supply voltage level translator/transceiver; 3-state
VI 90 %
tW
negative
pulse
VM
10 %
0V
tf
VI
positive
pulse
tr
90 %
VM
10 %
0V
tW
VM
tr
tf
VM
VI
G
VCC
VO
DUT
VEXT
RL
RT
CL
RL
Test data is given in Table 10.
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance.
VEXT = External voltage for measuring switching times.
Fig 8. Load circuitry for switching times
001aae331
Table 10. Test data
Supply voltage Input
VCC(A), VCC(B)
1.1 V to 1.6 V
1.65 V to 2.7 V
3.0 V to 3.6 V
VI[1]
VCCI
VCCI
VCCI
∆t/∆V[2]
≤ 1.0 ns/V
≤ 1.0 ns/V
≤ 1.0 ns/V
Load
CL
15 pF
15 pF
15 pF
[1] VCCI is the supply voltage associated with the data input port.
[2] dV/dt ≥ 1.0 V/ns
[3] VCCO is the supply voltage associated with the output port.
RL
2 kΩ
2 kΩ
2 kΩ
VEXT
tPLH, tPHL
open
open
open
tPZH, tPHZ
GND
GND
GND
tPZL, tPLZ[3]
2VCCO
2VCCO
2VCCO
74AVCH2T45_3
Product data sheet
Rev. 03 — 6 May 2009
© NXP B.V. 2009. All rights reserved.
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